Archive for February, 2011

Football – Appalachian Style

February 21, 2011

Great football teams are opportunistic.  Ask the former national champion college football outfit from Michigan about their 2007 close encounter of the worst kind with a certain team from the mountains of North Carolina.  If you know anything about football in Appalachia, you know every play – I said every play is a scoring opportunity for a team like Appalachian State University.  A quarterback with one of these teams needs his team to protect him, then open not just one route to the goal line but two, three, or maybe four each play.  He needs good receivers down field, a hole up the middle for a keeper, and a hand off route up the side, plus a half back ready for a lateral if necessary.  You get the idea.  He needs someone who can relieve him.  Rarely does every option actually present itself, but while the effort to develop every option during each play is strenuous, defending against it is even more so.  Of course not every play presents a touchdown opportunity, but if it presents a first down opportunity, eventually the score will materialize.  A defensive team will also see each play as a scoring opportunity, which they will either prevent, or make good on.  A team with this kind of agility – mental and physical – can exhaust a good defense by mid third quarter.  Don’t believe it?  Check how many of these teams make most of their points late in the game.  If you are the defense and the opposing team has a “triple option” quarterback which they support and protect, you know it is probably not going to be a great day – football wise.  Such teams are hard to assemble and difficult to maintain. Get two teams like this together and you will probably see a good game.

According to a Wikipedia article the owner of the Bristol, TN raceway has proposed the worlds largest college football game at “Thunder Valley” between VT and UT(K).  The speedway seats more than 160,000.  Each team was supposedly offered huge incentives.  But the game never happened.  Today the speedway infield has been reconfigured such that some think it is no longer even possible.  It is my opinion there was never much of a chance.  One of these teams plays what I call the Appalachian style of football.  Sometimes it is called “Beamer Ball” after the Tech coach – but it is essentially the same style of football played in the mountains of Virginia since I was young.  The other team is tried and true southeastern conference.  A “gridiron” team.  Perhaps they recognized the danger of playing a team which practiced a more “asynchronous” style of football – especially in front of 160,000 fans.


A simple Demonstration CPU Project

February 21, 2011

It is relatively easy (depending on your skill) to build yourself a demonstration Central Processing Unit.  Since the objective of this project is to demonstrate how things sort of work – there is no effort here to enter the space of advanced technology.  This is a very simple slice of an electronic processing unit.   The function is limited to educational, historical, and hobby interests.

First lets review the components of a processing unit.  Relatively modern “discrete” central processing units contain several modularized components.  First there is the actual binary processor which in a “discrete component” system contains the circuits for executing primitive binary operations.  This processor will have a four bit instruction set which means it can do 16 actual instructions.  It will also have two sets of data input leads as well as one set of data out leads.  Each of these sets will contain four leads – the same as the instruction  word.  In techno-speak four bits is actually known as a nibble, but for this machine the instruction word is four bits.   If the device did not operate on four bits it could not generate or manipulate it’s own instructions which would make compiling or assembling a program a bit tough.  The processor chip will also have a set of “flag” leads, so the state of the processor can be determined.  Additional circuitry will provide power, ground, and perhaps timing signals, etc..  Such a chip is available as the 74181 or 74381.

To support the binary processor we will need several memory devices.  Each of these is typically called a “latch” or “buffer” to connect each set of processor input, output, program, and flag leads with.  A latch saves an input state and stabilizes the voltage output state so the processing unit can make an accurate computation.  A typical latch or buffer will use an externally generated trigger signal to lock or clear it’s state. Latches holding input data for the processor will present their output to the processors input leads.  When computation is finished and the result posted on the output leads, the output latch saves and holds the set of output voltages so the storage system can record the result.   The latch holding  output for the processor will take its input from the processor as it’s input leads “face” the processor.  The 7475 or many of it’s variations would serve the 74181 series of operation processors.

To actually use the processor a “sequencer” is needed to choreograph the processing events.  Typically a processor would start by clearing and latching any input, program and flag data. Once these inputs are latched, the sequencer signals the processor to compute and then latches the output preserving the computation.  The sequencer can then restart the process of loading input data wile waiting on the output to be read, but must wait long enough for the read process is finish before proceeding with the next computation.  If slices are added to create a longer data word then carry flag circuitry must be added, chained together. and the sequencer adjusted so the carry operations have time to complete.

A sequencer can be constructed using a 4 bit counter to drive the inputs of a 74154 chip. The counter is driven by a “clock” signal obtained from a crystal controlled oscillator.

More advanced systems would add “register” memory which typically contain 16 latches/buffers/registers in an integrated array.  The 7489 should serve this function.  Once registers are added however the instruction word must be increased so the instruction can designate input and output registers.

Of course if you have an interest in making the slice cpu useful, eight are needed for a 32 bit address and instruction word. Their carry flags also need to be chained together for math operations. Also you will need some external main memory to write data into and read data and instructions from.  When you get the slices integrated together, you will have a machine which preforms much like an old mainframe computer.